The present invention relates to a method for generating addresses of a memory in which a plurality of data corresponding to a plurality of addresses can be assessed simultaneously.
Ordinarily, while a data is written in or read out of one address of a memory, the other memory addresses or locations cannot be accessed. If a plurality of addresses were accessible simultaneously, many advantages are realized, including an increase in processing speed due to the reduction of the access time, and so forth.
A method wherein a plurality of memory locations are accessed at the same time, has been proposed by the prior art. The ability to access, simultaneously, several memory locations is very important particularly when interpolation calculations are to be carried out. Under such circumstances, it is very useful to retrieve data located in adjacent memory locations simultaneously, because the value of an unknown parameter is calculated by interpolating between the adjacent values which are retrieved from the memory. Although the prior art teaches a method for simultaneous retrieval of adjacent data, that method is applicable to one dimensional data space only. For example, when addresses (x) which correspond to the numbers 0, 1, 2, 3, . . . , increase solely along one-dimention, a memory 1 having addresses continuously composed, as shown in FIG. 1, is separated into a plurality of distinct memory banks, and the addresses are not stored continuously into the plurality (two in this embodiment) of memory banks 2 and 3, as shown in FIG. 2a, but instead are stored in an interlace fashion into bank memories 4 and 5 by a so-called memory interlacing method, as shown in FIG. 2b. According to the memory interlacing method, the adjacent addresses such as (2) and (3), or (15) and (16) can be accessed at the same time.
However, in a conventional memory such as a table memory having 2-dimensional addresses (x,y), wherein x is a progression of 0, 1, 2, 3, . . . and y is a progression of 0, 1, 2, 3, . . . , a plurality of addresses i.e. memory locations cannot be accessed at the same time. The prior art interlacing method which is applicable to one-dimensional addresses cannot be used with 2-dimensional memories. Accordingly, there exists no effective way for dividing a multi-dimensionally organized memory into distinct memory banks to enable simultaneous accessing of data according to known art.